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7f1aabb280
| Author | SHA1 | Date | |
|---|---|---|---|
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7f1aabb280 | ||
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a88ce8c12f |
@ -168,6 +168,7 @@ void processRequest(Request *request)
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int main()
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{
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std::signal(SIGPIPE, SIG_IGN);
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std::signal(SIGINT, [](int) { loop.exit(0); });
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std::thread(serverThread).detach();
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auto cm = std::make_unique<CameraManager>();
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28
chip_test_example/Makefile
Normal file
28
chip_test_example/Makefile
Normal file
@ -0,0 +1,28 @@
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# Build on device:
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# apt install g++
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# make
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# All deps (spidev, gpiochip, i2c-dev, termios) are kernel headers — no apt libs needed.
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CXX ?= g++
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CXXFLAGS ?= -O2 -std=c++17 -Wall -Wextra
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TARGETS = lora_tx lora_rx imu_test gps_test
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all: $(TARGETS)
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lora_tx: lora_tx.cpp lr1121_malnus.hpp
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$(CXX) $(CXXFLAGS) $< -lpthread -o $@
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lora_rx: lora_rx.cpp lr1121_malnus.hpp
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$(CXX) $(CXXFLAGS) $< -lpthread -o $@
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imu_test: imu_test.cpp icm20948.hpp
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$(CXX) $(CXXFLAGS) $< -lpthread -o $@
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gps_test: gps_test.cpp gps.hpp
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$(CXX) $(CXXFLAGS) $< -o $@
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clean:
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rm -f $(TARGETS)
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.PHONY: all clean
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@ -3,24 +3,32 @@
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Tests for LR1121 LoRa, ICM-20948 IMU, u-blox GPS on Raspberry Pi Zero W 2.
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Header-only drivers, kernel ioctls, no external libs.
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Driver: `lr1121_malnus.hpp` — crystal oscillator, RF switch via DIO5/DIO6.
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---
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## Wiring
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### LR1121 (SPI0)
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| Module | Pi GPIO | Pi pin |
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|--------|---------|--------|
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| SCK | GPIO11 | 23 |
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| MOSI | GPIO10 | 19 |
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| MISO | GPIO9 | 21 |
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| NSS | GPIO8 | 24 |
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| BUSY | GPIO24 | 18 |
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| NRESET | GPIO25 | 22 |
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| DIO9 | GPIO4 | 7 |
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| DIO8 | GPIO23 | 16 |
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| Module | Pi GPIO | Pi pin |
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|---------|---------|--------|
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| SCK | GPIO11 | 23 |
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| MOSI | GPIO10 | 19 |
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| MISO | GPIO9 | 21 |
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| NSS | GPIO8 | 24 |
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| BUSY | GPIO24 | 18 |
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| NRESET | GPIO25 | 22 |
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| DIO5 | — | chip-driven RF switch (RFSW0) |
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| DIO6 | — | chip-driven RF switch (RFSW1) |
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| DIO9 | GPIO4 | 7 |
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| DIO8 | GPIO23 | 16 |
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Enable: `sudo raspi-config` → Interfaces → SPI → Yes → reboot
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DIO5 and DIO6 are driven directly by the LR1121 — they go to your module's RF
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switch and do not connect to the Pi. The driver configures them automatically
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via `SetDioAsRfSwitch`: HIGH on DIO5 in RX, HIGH on DIO6 in TX, both LOW in standby.
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Enable SPI: `sudo raspi-config` → Interfaces → SPI → Yes → reboot
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### ICM-20948 (I2C1)
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@ -63,28 +71,29 @@ sudo ./imu_test -v
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## LoRa debug
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```sh
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ls /dev/spidev0.0 # SPI on?
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ls /dev/spidev0.0 # SPI enabled?
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sudo ./lora_rx -v --433 # step labels show exactly which command hangs
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```
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If it hangs at `Calibrate` — that's a TCXO config issue. Try in order:
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If it hangs at `Calibrate` — the chip isn't responding over SPI at all.
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Check wiring, CS, and that SPI is enabled. The crystal needs no tuning.
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```sh
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sudo ./lora_rx -v --433 --tcxo-none # skip TCXO entirely (crystal mode)
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sudo ./lora_rx -v --433 --tcxo-27 # TCXO 2.7V
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sudo ./lora_rx -v --433 --tcxo-33 # TCXO 3.3V (default)
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```
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If TX/RX runs but packets never arrive — check that DIO5/DIO6 reach the RF
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switch on your module. Without the switch, the antenna path is disconnected.
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The one that gets past "Calibrate done" is your module's config.
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Use the same TCXO flag on TX and RX.
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If using the 2.4 GHz antenna instead:
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To try 2.4 GHz instead (different antenna required):
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```sh
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sudo ./lora_rx -v --24
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sudo ./lora_tx -v --24
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```
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If the chip is stuck in bootloader (fw < 0x02xx), escape with:
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```sh
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sudo ./lora_rx --reset
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```
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---
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## IMU debug
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@ -107,14 +116,3 @@ stty -F /dev/serial0 38400 raw && cat /dev/serial0 # raw NMEA bytes
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./gps_test -v -a # all sentences
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./gps_test -b 9600 # try different baud
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```
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---
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## TCXO voltage reference
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| Flag | Value | Voltage |
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|------|-------|---------|
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| `--tcxo-none` | 0xFF | no TCXO (crystal) |
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| `--tcxo-27` | 0x05 | 2.7V |
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| `--tcxo-33` | 0x07 | 3.3V |
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| `--tcxo-v N` | 0x00–0x07 | raw byte |
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266
chip_test_example/icm20948.hpp
Normal file
266
chip_test_example/icm20948.hpp
Normal file
@ -0,0 +1,266 @@
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// icm20948.hpp — InvenSense ICM-20948 IMU driver
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// Linux /dev/i2c-1 via I2C_RDWR ioctl — no external libs, no libgpiod.
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//
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// Hardware (THE TRUTH):
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// SDA = GPIO2 (pin 3), SCL = GPIO3 (pin 5)
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// VDD = 3.3V, GND = GND
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// AD0 pin determines I2C address: GND → 0x68, VCC → 0x69
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//
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// If i2cdetect -y 1 shows nothing:
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// 1. Enable I2C: sudo raspi-config → Interfaces → I2C → Yes → reboot
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// 2. Check wiring — SDA/SCL must have pull-ups (Pi has built-in 1.8kΩ)
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// 3. Verify AD0 pin state to confirm address (0x68 vs 0x69)
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// 4. Try slower I2C: add i2c_arm_baudrate=50000 in /boot/config.txt
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#pragma once
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#include <chrono>
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#include <cstdio>
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#include <cstring>
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#include <initializer_list>
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#include <thread>
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#include <fcntl.h>
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#include <linux/i2c-dev.h>
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#include <linux/i2c.h>
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#include <sys/ioctl.h>
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#include <unistd.h>
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namespace icm20948 {
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// ---- Register map (Bank 0) -------------------------------------------------
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constexpr uint8_t REG_WHO_AM_I = 0x00; // should read 0xEA
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constexpr uint8_t REG_USER_CTRL = 0x03;
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constexpr uint8_t REG_PWR_MGMT_1 = 0x06; // bit7=DEVICE_RESET, bits2:0=CLKSEL
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constexpr uint8_t REG_PWR_MGMT_2 = 0x07; // bit5:3=disable_accel, bit2:0=disable_gyro
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constexpr uint8_t REG_ACCEL_XOUT_H = 0x2D;
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constexpr uint8_t REG_GYRO_XOUT_H = 0x33;
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constexpr uint8_t REG_TEMP_OUT_H = 0x39;
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constexpr uint8_t REG_INT_STATUS = 0x19;
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constexpr uint8_t REG_BANK_SEL = 0x7F;
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// ---- Register map (Bank 2) -------------------------------------------------
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constexpr uint8_t B2_GYRO_SMPLRT_DIV = 0x00;
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constexpr uint8_t B2_GYRO_CONFIG_1 = 0x01; // bits3:2=FS_SEL bits1:0=DLPF
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constexpr uint8_t B2_ACCEL_SMPLRT_DIV_1 = 0x10;
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constexpr uint8_t B2_ACCEL_SMPLRT_DIV_2 = 0x11;
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constexpr uint8_t B2_ACCEL_CONFIG = 0x14; // bits3:2=FS_SEL bits1:0=DLPF
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constexpr uint8_t WHO_AM_I_VAL = 0xEA;
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// ---- Scale configuration ---------------------------------------------------
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// Accel full-scale: 0=±2g 1=±4g 2=±8g 3=±16g
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// Gyro full-scale: 0=±250 1=±500 2=±1000 3=±2000 dps
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constexpr float ACCEL_SCALE[4] = { 2.0f/32768, 4.0f/32768, 8.0f/32768, 16.0f/32768 };
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constexpr float GYRO_SCALE[4] = { 250.0f/32768, 500.0f/32768, 1000.0f/32768, 2000.0f/32768 };
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// Raw 16-bit sensor sample
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struct RawSample {
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int16_t ax, ay, az; // accelerometer
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int16_t gx, gy, gz; // gyroscope
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int16_t temp_raw; // temperature raw
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};
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// Scaled sample with physical units
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struct Sample {
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float ax, ay, az; // g
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float gx, gy, gz; // deg/s
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float temp_c; // Celsius
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};
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struct Config {
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const char *i2c_path = "/dev/i2c-1";
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uint8_t accel_fs = 0; // 0=±2g, 1=±4g, 2=±8g, 3=±16g
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uint8_t gyro_fs = 0; // 0=±250dps, 1=±500, 2=±1000, 3=±2000
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bool verbose = false;
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};
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class Imu {
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public:
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bool begin(const Config &cfg);
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void end();
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// Returns true when new data is read.
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bool read(RawSample &raw);
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bool read(Sample &s);
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// Returns the detected I2C address (0x68 or 0x69), or 0 if not found.
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uint8_t address() const { return addr_; }
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// Direct register access (for debugging / bank switching experiments).
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bool writeReg(uint8_t reg, uint8_t val);
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uint8_t readReg(uint8_t reg);
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bool readRegs(uint8_t reg, uint8_t *buf, uint8_t n);
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bool selectBank(uint8_t bank); // 0–3
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private:
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Config cfg_{};
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int fd_ = -1;
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uint8_t addr_ = 0;
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uint8_t accel_fs_ = 0;
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uint8_t gyro_fs_ = 0;
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};
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// ---- Implementation ---------------------------------------------------------
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inline bool Imu::writeReg(uint8_t reg, uint8_t val)
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{
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uint8_t buf[2] = { reg, val };
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i2c_msg msg{};
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msg.addr = addr_;
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msg.flags = 0;
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msg.len = 2;
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msg.buf = buf;
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i2c_rdwr_ioctl_data io{};
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io.msgs = &msg;
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io.nmsgs = 1;
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return ioctl(fd_, I2C_RDWR, &io) == 1;
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}
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inline bool Imu::readRegs(uint8_t reg, uint8_t *buf, uint8_t n)
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{
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// Generates proper repeated-start: [START|ADDR+W|REG|RSTART|ADDR+R|DATA|STOP]
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i2c_msg msgs[2]{};
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msgs[0].addr = addr_;
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msgs[0].flags = 0;
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msgs[0].len = 1;
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msgs[0].buf = ®
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msgs[1].addr = addr_;
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msgs[1].flags = I2C_M_RD;
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msgs[1].len = n;
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msgs[1].buf = buf;
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i2c_rdwr_ioctl_data io{};
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io.msgs = msgs;
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io.nmsgs = 2;
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return ioctl(fd_, I2C_RDWR, &io) == 2;
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}
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inline uint8_t Imu::readReg(uint8_t reg)
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{
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uint8_t v = 0;
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readRegs(reg, &v, 1);
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return v;
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}
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inline bool Imu::selectBank(uint8_t bank)
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{
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return writeReg(REG_BANK_SEL, (uint8_t)(bank << 4));
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}
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inline bool Imu::begin(const Config &c)
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{
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cfg_ = c;
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fd_ = ::open(c.i2c_path, O_RDWR);
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if (fd_ < 0) {
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if (c.verbose)
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std::fprintf(stderr, "[icm20948] cannot open %s: %m\n", c.i2c_path);
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return false;
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}
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// Auto-detect I2C address (AD0 low → 0x68, AD0 high → 0x69)
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bool found = false;
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for (uint8_t a : {(uint8_t)0x68, (uint8_t)0x69}) {
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addr_ = a;
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// Ensure bank 0 before reading WHO_AM_I
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writeReg(REG_BANK_SEL, 0x00);
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uint8_t id = readReg(REG_WHO_AM_I);
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if (c.verbose)
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std::fprintf(stderr, "[icm20948] probe 0x%02X → WHO_AM_I = 0x%02X\n", a, id);
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if (id == WHO_AM_I_VAL) { found = true; break; }
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}
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if (!found) {
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if (c.verbose)
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std::fprintf(stderr, "[icm20948] chip not found on %s at 0x68 or 0x69\n"
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" check wiring, I2C enabled, pull-ups\n",
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c.i2c_path);
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::close(fd_); fd_ = -1;
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return false;
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}
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if (c.verbose)
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std::fprintf(stderr, "[icm20948] found at 0x%02X\n", addr_);
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// Device reset — sets all registers to default values.
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selectBank(0);
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writeReg(REG_PWR_MGMT_1, 0x80); // DEVICE_RESET bit
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std::this_thread::sleep_for(std::chrono::milliseconds(100));
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// Wait until reset is complete (DEVICE_RESET bit self-clears).
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for (int i = 0; i < 50; ++i) {
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if (!(readReg(REG_PWR_MGMT_1) & 0x80)) break;
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std::this_thread::sleep_for(std::chrono::milliseconds(10));
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}
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// Verify still alive after reset.
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if (readReg(REG_WHO_AM_I) != WHO_AM_I_VAL) {
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if (c.verbose)
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std::fprintf(stderr, "[icm20948] WHO_AM_I mismatch after reset\n");
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::close(fd_); fd_ = -1;
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return false;
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}
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// Wake up: auto-select clock source (best practice per datasheet).
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writeReg(REG_PWR_MGMT_1, 0x01);
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std::this_thread::sleep_for(std::chrono::milliseconds(30));
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// Enable all accel + gyro axes.
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writeReg(REG_PWR_MGMT_2, 0x00);
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// Configure full-scale in Bank 2.
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accel_fs_ = c.accel_fs & 0x03;
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gyro_fs_ = c.gyro_fs & 0x03;
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selectBank(2);
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writeReg(B2_ACCEL_CONFIG, (uint8_t)(accel_fs_ << 2));
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writeReg(B2_GYRO_CONFIG_1, (uint8_t)(gyro_fs_ << 2));
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selectBank(0); // leave in bank 0 for normal operation
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if (c.verbose) {
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static const unsigned gyro_dps[] = { 250u, 500u, 1000u, 2000u };
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std::fprintf(stderr, "[icm20948] init OK: accel ±%ug gyro ±%udps\n",
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(unsigned)(2u << accel_fs_), gyro_dps[gyro_fs_]);
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}
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return true;
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}
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inline void Imu::end()
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{
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if (fd_ >= 0) { ::close(fd_); fd_ = -1; }
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}
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inline bool Imu::read(RawSample &raw)
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{
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selectBank(0);
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uint8_t buf[14]{};
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if (!readRegs(REG_ACCEL_XOUT_H, buf, 14)) return false;
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auto s16 = [](uint8_t hi, uint8_t lo) -> int16_t {
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return (int16_t)((uint16_t)hi << 8 | lo);
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};
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raw.ax = s16(buf[0], buf[1]);
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raw.ay = s16(buf[2], buf[3]);
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raw.az = s16(buf[4], buf[5]);
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raw.temp_raw = s16(buf[6], buf[7]);
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raw.gx = s16(buf[8], buf[9]);
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raw.gy = s16(buf[10], buf[11]);
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raw.gz = s16(buf[12], buf[13]);
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return true;
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}
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inline bool Imu::read(Sample &s)
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{
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RawSample raw{};
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if (!read(raw)) return false;
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float as = ACCEL_SCALE[accel_fs_];
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float gs = GYRO_SCALE[gyro_fs_];
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s.ax = raw.ax * as;
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s.ay = raw.ay * as;
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s.az = raw.az * as;
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s.gx = raw.gx * gs;
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s.gy = raw.gy * gs;
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s.gz = raw.gz * gs;
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// Temp formula from ICM-20948 datasheet: T°C = (raw - 0) / 333.87 + 21.0
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s.temp_c = (float)raw.temp_raw / 333.87f + 21.0f;
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return true;
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}
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} // namespace icm20948
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69
chip_test_example/imu_test.cpp
Normal file
69
chip_test_example/imu_test.cpp
Normal file
@ -0,0 +1,69 @@
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// imu_test.cpp — ICM-20948 IMU test
|
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// Usage: sudo ./imu_test [-v] [-r] [-n COUNT]
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// -v verbose init debug
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// -r print raw 16-bit values instead of scaled
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// -n COUNT exit after COUNT samples (default: run forever)
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//
|
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// If chip not found:
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// sudo i2cdetect -y 1 ← check 0x68 or 0x69 appears
|
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// If nothing shows: check wiring, I2C enabled in raspi-config
|
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#include <cstdio>
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#include <cstdlib>
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#include <cstring>
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#include <thread>
|
||||
#include <chrono>
|
||||
#include "icm20948.hpp"
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
icm20948::Config cfg;
|
||||
cfg.verbose = false;
|
||||
bool raw_mode = false;
|
||||
int count = -1;
|
||||
|
||||
for (int i = 1; i < argc; ++i) {
|
||||
if (std::strcmp(argv[i], "-v") == 0) {
|
||||
cfg.verbose = true;
|
||||
} else if (std::strcmp(argv[i], "-r") == 0) {
|
||||
raw_mode = true;
|
||||
} else if (std::strcmp(argv[i], "-n") == 0 && i + 1 < argc) {
|
||||
count = std::atoi(argv[++i]);
|
||||
}
|
||||
}
|
||||
|
||||
icm20948::Imu imu;
|
||||
if (!imu.begin(cfg)) {
|
||||
std::fprintf(stderr, "ERROR: IMU init failed\n"
|
||||
" Check: I2C enabled? (sudo raspi-config)\n"
|
||||
" Check: sudo i2cdetect -y 1\n"
|
||||
" Check: wiring SDA=GPIO2 SCL=GPIO3\n"
|
||||
" Check: AD0 pin → 0x68 (GND) or 0x69 (VCC)\n"
|
||||
" Run with -v for detailed debug output\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
std::printf("IMU OK at 0x%02X — reading at 10 Hz%s\n\n",
|
||||
imu.address(), raw_mode ? " (raw mode)" : "");
|
||||
|
||||
for (int n = 0; count < 0 || n < count; ++n) {
|
||||
if (raw_mode) {
|
||||
icm20948::RawSample raw{};
|
||||
if (!imu.read(raw)) { std::fprintf(stderr, "read error\n"); break; }
|
||||
std::printf("ax=%6d ay=%6d az=%6d | gx=%6d gy=%6d gz=%6d | t_raw=%6d\n",
|
||||
raw.ax, raw.ay, raw.az, raw.gx, raw.gy, raw.gz, raw.temp_raw);
|
||||
} else {
|
||||
icm20948::Sample s{};
|
||||
if (!imu.read(s)) { std::fprintf(stderr, "read error\n"); break; }
|
||||
std::printf("a[g] %+7.3f %+7.3f %+7.3f | "
|
||||
"g[°/s] %+8.2f %+8.2f %+8.2f | "
|
||||
"T %.1f°C\n",
|
||||
s.ax, s.ay, s.az,
|
||||
s.gx, s.gy, s.gz,
|
||||
s.temp_c);
|
||||
}
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(100));
|
||||
}
|
||||
|
||||
imu.end();
|
||||
return 0;
|
||||
}
|
||||
95
chip_test_example/lora_rx.cpp
Normal file
95
chip_test_example/lora_rx.cpp
Normal file
@ -0,0 +1,95 @@
|
||||
// lora_rx.cpp — LR1121 receive test
|
||||
// Usage: sudo ./lora_rx [-v] [--433|--868|--24|freq_hz] [--reset]
|
||||
// -v verbose step labels (shows exactly where init hangs)
|
||||
// --433 433.05 MHz (default)
|
||||
// --868 868 MHz
|
||||
// --24 2403 MHz
|
||||
// freq_hz any raw frequency in Hz
|
||||
// --reset send Reboot(app) to escape bootloader, print fw before/after, exit
|
||||
//
|
||||
// TX and RX must use identical SF/BW/CR/freq settings.
|
||||
// Requires SPI: sudo raspi-config → Interfaces → SPI → Yes → reboot
|
||||
#include <cstdio>
|
||||
#include <cstdlib>
|
||||
#include <cstring>
|
||||
#include "lr1121_malnus.hpp"
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
lr1121::Config cfg;
|
||||
cfg.verbose = false;
|
||||
cfg.pa_sel = 0x01;
|
||||
cfg.tx_dbm = 14;
|
||||
cfg.sf = 0x07; // SF7
|
||||
cfg.bw = 0x04; // 125 kHz
|
||||
cfg.cr = 0x01; // CR 4/5
|
||||
bool do_reset = false;
|
||||
|
||||
for (int i = 1; i < argc; ++i) {
|
||||
if (std::strcmp(argv[i], "-v") == 0) cfg.verbose = true;
|
||||
else if (std::strcmp(argv[i], "--433") == 0) cfg.freq_hz = lr1121::FREQ_433;
|
||||
else if (std::strcmp(argv[i], "--868") == 0) cfg.freq_hz = lr1121::FREQ_868;
|
||||
else if (std::strcmp(argv[i], "--24") == 0 ||
|
||||
std::strcmp(argv[i], "--2g4") == 0) cfg.freq_hz = lr1121::FREQ_2400;
|
||||
else if (std::strcmp(argv[i], "--reset") == 0) do_reset = true;
|
||||
else cfg.freq_hz = (uint32_t)std::strtoul(argv[i], nullptr, 10);
|
||||
}
|
||||
|
||||
std::printf("lora_rx: %u Hz SF%u BW=0x%02X%s\n",
|
||||
cfg.freq_hz, cfg.sf, cfg.bw,
|
||||
cfg.verbose ? " [verbose]" : "");
|
||||
|
||||
if (do_reset) {
|
||||
cfg.verbose = true;
|
||||
lr1121::Radio radio;
|
||||
if (!radio.beginRaw(cfg)) {
|
||||
std::fprintf(stderr, "ERROR: cannot open SPI/GPIO\n");
|
||||
return 1;
|
||||
}
|
||||
auto v1 = radio.getVersion();
|
||||
std::printf("before reboot: hw=0x%02X type=0x%02X fw=0x%02X%02X\n",
|
||||
v1.hw, v1.type, v1.fw_hi, v1.fw_lo);
|
||||
std::printf("sending Reboot(app)...\n");
|
||||
radio.reboot(false);
|
||||
auto v2 = radio.getVersion();
|
||||
std::printf("after reboot: hw=0x%02X type=0x%02X fw=0x%02X%02X\n",
|
||||
v2.hw, v2.type, v2.fw_hi, v2.fw_lo);
|
||||
if (v2.fw_hi >= 0x02)
|
||||
std::printf("OK — application firmware active (fw >= 0x02xx)\n"
|
||||
"Run without --reset to continue.\n");
|
||||
else
|
||||
std::printf("Still in bootloader (fw=0x%02X%02X).\n",
|
||||
v2.fw_hi, v2.fw_lo);
|
||||
radio.end();
|
||||
return 0;
|
||||
}
|
||||
|
||||
lr1121::Radio radio;
|
||||
if (!radio.begin(cfg)) {
|
||||
std::fprintf(stderr, "ERROR: radio init failed\n"
|
||||
" Check: SPI enabled? wiring? DIO5/DIO6 connected?\n"
|
||||
" Run with -v for step-by-step output\n");
|
||||
return 1;
|
||||
}
|
||||
std::printf("Radio OK — listening (Ctrl+C to stop)\n\n");
|
||||
|
||||
uint8_t buf[256];
|
||||
int pkt = 0;
|
||||
for (;;) {
|
||||
lr1121::RxInfo info{};
|
||||
int r = radio.receive(buf, (uint8_t)(sizeof(buf) - 1), 30'000, &info);
|
||||
|
||||
if (r > 0) {
|
||||
buf[r] = '\0';
|
||||
std::printf("[%4d] %d B rssi=%d dBm snr=%d dB '%s'\n",
|
||||
++pkt, r, info.rssi_dbm, info.snr_db, buf);
|
||||
} else if (r == -1) {
|
||||
std::printf(" timeout (30s), still listening...\n");
|
||||
} else if (r == -2) {
|
||||
std::printf(" CRC error\n");
|
||||
}
|
||||
}
|
||||
|
||||
radio.end();
|
||||
return 0;
|
||||
}
|
||||
60
chip_test_example/lora_tx.cpp
Normal file
60
chip_test_example/lora_tx.cpp
Normal file
@ -0,0 +1,60 @@
|
||||
// lora_tx.cpp — LR1121 transmit test
|
||||
// Usage: sudo ./lora_tx [-v] [--433|--868|--24|freq_hz]
|
||||
// -v verbose step labels (shows exactly where init hangs)
|
||||
// --433 433.05 MHz (default)
|
||||
// --868 868 MHz
|
||||
// --24 2403 MHz
|
||||
// freq_hz any raw frequency in Hz
|
||||
//
|
||||
// Requires SPI: sudo raspi-config → Interfaces → SPI → Yes → reboot
|
||||
#include <cstdio>
|
||||
#include <cstdlib>
|
||||
#include <cstring>
|
||||
#include <thread>
|
||||
#include <chrono>
|
||||
#include "lr1121_malnus.hpp"
|
||||
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
lr1121::Config cfg;
|
||||
cfg.verbose = false;
|
||||
cfg.pa_sel = 0x01; // HP PA — most modules; change to 0x00 for LP
|
||||
cfg.tx_dbm = 14;
|
||||
cfg.sf = 0x07; // SF7
|
||||
cfg.bw = 0x04; // 125 kHz
|
||||
cfg.cr = 0x01; // CR 4/5
|
||||
|
||||
for (int i = 1; i < argc; ++i) {
|
||||
if (std::strcmp(argv[i], "-v") == 0) cfg.verbose = true;
|
||||
else if (std::strcmp(argv[i], "--433") == 0) cfg.freq_hz = lr1121::FREQ_433;
|
||||
else if (std::strcmp(argv[i], "--868") == 0) cfg.freq_hz = lr1121::FREQ_868;
|
||||
else if (std::strcmp(argv[i], "--24") == 0 ||
|
||||
std::strcmp(argv[i], "--2g4") == 0) cfg.freq_hz = lr1121::FREQ_2400;
|
||||
else cfg.freq_hz = (uint32_t)std::strtoul(argv[i], nullptr, 10);
|
||||
}
|
||||
|
||||
std::printf("lora_tx: %u Hz SF%u BW=0x%02X PA=%s%s\n",
|
||||
cfg.freq_hz, cfg.sf, cfg.bw,
|
||||
cfg.pa_sel ? "HP" : "LP",
|
||||
cfg.verbose ? " [verbose]" : "");
|
||||
|
||||
lr1121::Radio radio;
|
||||
if (!radio.begin(cfg)) {
|
||||
std::fprintf(stderr, "ERROR: radio init failed\n"
|
||||
" Check: SPI enabled? wiring? DIO5/DIO6 connected?\n"
|
||||
" Run with -v for step-by-step output\n");
|
||||
return 1;
|
||||
}
|
||||
std::printf("Radio OK — sending every second\n");
|
||||
|
||||
for (int n = 0; ; ++n) {
|
||||
char msg[32];
|
||||
int len = std::snprintf(msg, sizeof(msg), "hello %d", n);
|
||||
bool ok = radio.send((const uint8_t *)msg, (uint8_t)len);
|
||||
std::printf("[%4d] tx '%s' → %s\n", n, msg, ok ? "OK" : "TIMEOUT");
|
||||
std::this_thread::sleep_for(std::chrono::seconds(1));
|
||||
}
|
||||
|
||||
radio.end();
|
||||
return 0;
|
||||
}
|
||||
552
chip_test_example/lr1121_malnus.hpp
Normal file
552
chip_test_example/lr1121_malnus.hpp
Normal file
@ -0,0 +1,552 @@
|
||||
// lr1121_malnus.hpp — LR1121 LoRa driver, tuned for this exact board
|
||||
//
|
||||
// Hardware (hardwired):
|
||||
// /dev/spidev0.0 CE0=GPIO8, MISO=GPIO9, MOSI=GPIO10, SCK=GPIO11
|
||||
// GPIO24 LR_DIO0/BUSY
|
||||
// GPIO25 LR_nRESET
|
||||
// DIO5 RF switch RFSW0 — driven by chip (HIGH in RX)
|
||||
// DIO6 RF switch RFSW1 — driven by chip (HIGH in TX)
|
||||
//
|
||||
// Crystal oscillator — no TCXO, no SetTcxoMode, no calibration guessing.
|
||||
// RF switch is configured via SetDioAsRfSwitch (opcode 0x022D) so DIO5/DIO6
|
||||
// are driven automatically by the chip in the correct state for TX/RX/standby.
|
||||
#pragma once
|
||||
|
||||
#include <chrono>
|
||||
#include <cstdio>
|
||||
#include <cstring>
|
||||
#include <thread>
|
||||
|
||||
#include <fcntl.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/spi/spidev.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <unistd.h>
|
||||
|
||||
namespace lr1121 {
|
||||
|
||||
// ---- Opcodes (SWDR001 confirmed) -------------------------------------------
|
||||
// system
|
||||
constexpr uint16_t OC_GET_STATUS = 0x0100;
|
||||
constexpr uint16_t OC_GET_VERSION = 0x0101; // → [hw,type,fw_hi,fw_lo]
|
||||
constexpr uint16_t OC_CLEAR_ERRORS = 0x010E;
|
||||
constexpr uint16_t OC_CALIBRATE = 0x010F; // 1B bitmask
|
||||
constexpr uint16_t OC_SET_REGMODE = 0x0110; // 1B: 0=LDO, 1=DCDC
|
||||
constexpr uint16_t OC_CALIBRATE_IMAGE = 0x0111; // 2B: freq1, freq2 (× 4 MHz)
|
||||
constexpr uint16_t OC_SET_DIOIRQ = 0x0113; // 4B dio9_mask + 4B dio8_mask
|
||||
constexpr uint16_t OC_CLEAR_IRQ = 0x0114;
|
||||
constexpr uint16_t OC_REBOOT = 0x0118; // 1B: 0=app, 1=stay bootloader
|
||||
constexpr uint16_t OC_SET_STANDBY = 0x011C; // 1B: 0=RC, 1=XOSC
|
||||
// regmem / buffer
|
||||
constexpr uint16_t OC_WRITE_BUF8 = 0x0109;
|
||||
constexpr uint16_t OC_READ_BUF8 = 0x010A; // 1B offset + 1B len → N bytes
|
||||
// radio
|
||||
constexpr uint16_t OC_GET_PKT_STATUS = 0x0204; // LoRa → [rssi,snr,sig_rssi]
|
||||
constexpr uint16_t OC_GET_RXBUF_STA = 0x0203; // → [payload_len, rx_ptr]
|
||||
constexpr uint16_t OC_SET_LORA_NET = 0x0208; // 1B: 0=private, 1=LoRaWAN
|
||||
constexpr uint16_t OC_SET_RX = 0x0209; // 3B timeout RTC steps (32768/s)
|
||||
constexpr uint16_t OC_SET_TX = 0x020A; // 3B timeout (0=until TxDone)
|
||||
constexpr uint16_t OC_SET_RF_FREQ = 0x020B; // 4B Hz big-endian
|
||||
constexpr uint16_t OC_SET_PKT_TYPE = 0x020E; // 1B: 0x02=LoRa
|
||||
constexpr uint16_t OC_SET_MOD_PARAM = 0x020F; // SF,BW,CR,LDRO
|
||||
constexpr uint16_t OC_SET_PKT_PARAM = 0x0210; // preamble(2B),hdr,len,crc,iq
|
||||
constexpr uint16_t OC_SET_TX_PARAMS = 0x0211; // 1B pwr(int8) + 1B ramp
|
||||
constexpr uint16_t OC_SET_PKT_ADRS = 0x0212; // 1B tx_base + 1B rx_base
|
||||
constexpr uint16_t OC_SET_PA_CFG = 0x0215; // pa_sel,pa_supply,duty,hp_max
|
||||
constexpr uint16_t OC_SET_FALLBACK_MODE = 0x020C; // 1B: 0x01=STBY_RC, 0x02=STBY_XOSC
|
||||
// RF switch — DIO5/DIO6 driven by chip based on TX/RX/STBY state
|
||||
constexpr uint16_t OC_SET_DIO_AS_RFSW = 0x022D; // 8B: enable + 7 mode masks
|
||||
|
||||
// ---- IRQ bit masks ---------------------------------------------------------
|
||||
constexpr uint32_t IRQ_TX_DONE = (1u << 2);
|
||||
constexpr uint32_t IRQ_RX_DONE = (1u << 3);
|
||||
constexpr uint32_t IRQ_CRC_ERR = (1u << 7);
|
||||
constexpr uint32_t IRQ_TIMEOUT = (1u << 10);
|
||||
constexpr uint32_t IRQ_ALL = 0x07FF'FFFFu;
|
||||
|
||||
// ---- Calibration bitmask ---------------------------------------------------
|
||||
constexpr uint8_t CALIB_LF_RC = (1 << 0);
|
||||
constexpr uint8_t CALIB_HF_RC = (1 << 1);
|
||||
constexpr uint8_t CALIB_PLL = (1 << 2);
|
||||
constexpr uint8_t CALIB_ADC = (1 << 3);
|
||||
constexpr uint8_t CALIB_IMAGE = (1 << 4);
|
||||
constexpr uint8_t CALIB_PLL_TX = (1 << 5);
|
||||
constexpr uint8_t CALIB_ALL = 0x3F;
|
||||
|
||||
// ---- Modulation constants --------------------------------------------------
|
||||
// SF: 0x05=SF5 .. 0x0C=SF12 (0x07=SF7 is good for short-range tests)
|
||||
// BW: 0x01=15.6k 0x02=31.2k 0x03=62.5k 0x04=125k 0x05=250k 0x06=500k
|
||||
// CR: 0x01=4/5 0x02=4/6 0x03=4/7 0x04=4/8
|
||||
// PA: 0x00=LP (≤15 dBm), 0x01=HP (≤22 dBm) — most modules use HP
|
||||
|
||||
constexpr uint32_t FREQ_433 = 433'050'000;
|
||||
constexpr uint32_t FREQ_868 = 868'000'000;
|
||||
constexpr uint32_t FREQ_2400 = 2'403'000'000;
|
||||
|
||||
struct Config {
|
||||
const char *spi_path = "/dev/spidev0.0";
|
||||
uint32_t spi_hz = 8'000'000;
|
||||
const char *gpio_chip = "/dev/gpiochip0";
|
||||
unsigned busy_gpio = 24; // LR_DIO0/BUSY
|
||||
unsigned reset_gpio = 25; // LR_nRESET
|
||||
uint32_t freq_hz = FREQ_433; // match your antenna
|
||||
uint8_t sf = 0x07; // SF7
|
||||
uint8_t bw = 0x04; // 125 kHz
|
||||
uint8_t cr = 0x01; // 4/5
|
||||
int8_t tx_dbm = 14; // −17..+22 dBm
|
||||
uint8_t pa_sel = 0x01; // 0x00=LP, 0x01=HP
|
||||
bool use_dcdc = true;
|
||||
bool lora_wan = false; // false = private sync word (0x12)
|
||||
bool verbose = false;
|
||||
};
|
||||
|
||||
struct RxInfo {
|
||||
int8_t rssi_dbm = 0;
|
||||
int8_t snr_db = 0;
|
||||
int8_t signal_rssi_dbm = 0;
|
||||
};
|
||||
|
||||
struct ChipVersion {
|
||||
uint8_t hw;
|
||||
uint8_t type; // 0x03 = LR1121
|
||||
uint8_t fw_hi;
|
||||
uint8_t fw_lo;
|
||||
};
|
||||
|
||||
class Radio {
|
||||
public:
|
||||
bool begin(const Config &cfg);
|
||||
void end();
|
||||
|
||||
// Returns true on TX done, false on timeout.
|
||||
bool send(const uint8_t *data, uint8_t n);
|
||||
|
||||
// Returns bytes received; -1=timeout, -2=CRC error.
|
||||
int receive(uint8_t *buf, uint8_t cap, uint32_t timeout_ms,
|
||||
RxInfo *rx_info = nullptr);
|
||||
|
||||
uint32_t getIrq();
|
||||
void clearIrq(uint32_t mask);
|
||||
ChipVersion getVersion();
|
||||
|
||||
// Open SPI + GPIOs and hard-reset the chip, skip calibration.
|
||||
// Useful for sending diagnostic commands if begin() hangs.
|
||||
bool beginRaw(const Config &cfg);
|
||||
|
||||
void reboot(bool stay_in_bootloader = false);
|
||||
|
||||
private:
|
||||
Config cfg_{};
|
||||
int spi_fd_ = -1;
|
||||
int reset_fd_ = -1;
|
||||
int busy_fd_ = -1;
|
||||
|
||||
void spiTransfer(uint8_t *buf, size_t n);
|
||||
void wcmd(uint16_t op, const uint8_t *p = nullptr, size_t n = 0);
|
||||
void rcmd(uint16_t op, const uint8_t *params, size_t np,
|
||||
uint8_t *out, size_t nr);
|
||||
void waitBusy();
|
||||
void hardReset();
|
||||
bool openGpio(unsigned line, bool out, int &fd_out);
|
||||
void setGpioLine(int fd, int val);
|
||||
int getGpioLine(int fd);
|
||||
|
||||
static void imgCalFreqs(uint32_t hz, uint8_t &f1, uint8_t &f2);
|
||||
static uint8_t computeLDRO(uint8_t sf, uint8_t bw);
|
||||
};
|
||||
|
||||
// ---- Implementation ---------------------------------------------------------
|
||||
|
||||
inline void Radio::spiTransfer(uint8_t *buf, size_t n)
|
||||
{
|
||||
spi_ioc_transfer tr{};
|
||||
tr.tx_buf = reinterpret_cast<uint64_t>(buf);
|
||||
tr.rx_buf = reinterpret_cast<uint64_t>(buf);
|
||||
tr.len = static_cast<uint32_t>(n);
|
||||
tr.speed_hz = cfg_.spi_hz;
|
||||
tr.bits_per_word = 8;
|
||||
ioctl(spi_fd_, SPI_IOC_MESSAGE(1), &tr);
|
||||
}
|
||||
|
||||
inline void Radio::wcmd(uint16_t op, const uint8_t *p, size_t n)
|
||||
{
|
||||
waitBusy();
|
||||
uint8_t buf[260];
|
||||
buf[0] = op >> 8; buf[1] = op & 0xFF;
|
||||
if (p && n) std::memcpy(buf + 2, p, n);
|
||||
spiTransfer(buf, 2 + n);
|
||||
waitBusy();
|
||||
}
|
||||
|
||||
inline void Radio::rcmd(uint16_t op, const uint8_t *params, size_t np,
|
||||
uint8_t *out, size_t nr)
|
||||
{
|
||||
waitBusy();
|
||||
uint8_t cbuf[16]{};
|
||||
cbuf[0] = op >> 8; cbuf[1] = op & 0xFF;
|
||||
if (params && np) std::memcpy(cbuf + 2, params, np);
|
||||
spiTransfer(cbuf, 2 + np);
|
||||
|
||||
waitBusy();
|
||||
uint8_t rbuf[260]{};
|
||||
spiTransfer(rbuf, nr + 1); // byte 0 is a dummy status
|
||||
std::memcpy(out, rbuf + 1, nr);
|
||||
}
|
||||
|
||||
// GetStatus: the LR1121 outputs [stat1, stat2, irq31:24, irq23:16, irq15:8, irq7:0]
|
||||
// on the first 6 MISO bytes of ANY SPI transaction — regardless of what opcode is sent.
|
||||
// (Confirmed in RadioLib source: it sends 6 null bytes with no opcode and reads buff[2..5].)
|
||||
// Does NOT call waitBusy() — designed to be polled freely during TX/RX.
|
||||
inline uint32_t Radio::getIrq()
|
||||
{
|
||||
uint8_t b[6] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
|
||||
spiTransfer(b, 6);
|
||||
// b[0]=stat1, b[1]=stat2, b[2..5]=irq[31:24..7:0]
|
||||
return ((uint32_t)b[2] << 24) | ((uint32_t)b[3] << 16)
|
||||
| ((uint32_t)b[4] << 8) | (uint32_t)b[5];
|
||||
}
|
||||
|
||||
inline void Radio::clearIrq(uint32_t mask)
|
||||
{
|
||||
uint8_t d[4] = { (uint8_t)(mask >> 24), (uint8_t)(mask >> 16),
|
||||
(uint8_t)(mask >> 8), (uint8_t)mask };
|
||||
wcmd(OC_CLEAR_IRQ, d, 4);
|
||||
}
|
||||
|
||||
inline void Radio::waitBusy()
|
||||
{
|
||||
for (int i = 0; i < 200'000; ++i) {
|
||||
if (!getGpioLine(busy_fd_)) return;
|
||||
std::this_thread::sleep_for(std::chrono::microseconds(50));
|
||||
}
|
||||
if (cfg_.verbose)
|
||||
std::fprintf(stderr, "[lr1121] waitBusy TIMEOUT after 10s — chip hung?\n");
|
||||
}
|
||||
|
||||
inline bool Radio::openGpio(unsigned line, bool out, int &fd_out)
|
||||
{
|
||||
int chip = ::open(cfg_.gpio_chip, O_RDWR);
|
||||
if (chip < 0) {
|
||||
if (cfg_.verbose)
|
||||
std::fprintf(stderr, "[lr1121] cannot open %s: %m\n", cfg_.gpio_chip);
|
||||
return false;
|
||||
}
|
||||
gpiohandle_request req{};
|
||||
req.lineoffsets[0] = line;
|
||||
req.lines = 1;
|
||||
req.flags = out ? GPIOHANDLE_REQUEST_OUTPUT : GPIOHANDLE_REQUEST_INPUT;
|
||||
req.default_values[0] = out ? 1 : 0;
|
||||
std::strncpy(req.consumer_label, "lr1121", sizeof(req.consumer_label) - 1);
|
||||
int r = ioctl(chip, GPIO_GET_LINEHANDLE_IOCTL, &req);
|
||||
::close(chip);
|
||||
if (r < 0) {
|
||||
if (cfg_.verbose)
|
||||
std::fprintf(stderr, "[lr1121] cannot get GPIO line %u: %m\n", line);
|
||||
return false;
|
||||
}
|
||||
fd_out = req.fd;
|
||||
return true;
|
||||
}
|
||||
|
||||
inline void Radio::setGpioLine(int fd, int val)
|
||||
{
|
||||
gpiohandle_data d{}; d.values[0] = val;
|
||||
ioctl(fd, GPIOHANDLE_SET_LINE_VALUES_IOCTL, &d);
|
||||
}
|
||||
|
||||
inline int Radio::getGpioLine(int fd)
|
||||
{
|
||||
gpiohandle_data d{};
|
||||
ioctl(fd, GPIOHANDLE_GET_LINE_VALUES_IOCTL, &d);
|
||||
return d.values[0];
|
||||
}
|
||||
|
||||
inline void Radio::hardReset()
|
||||
{
|
||||
setGpioLine(reset_fd_, 0);
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(10));
|
||||
setGpioLine(reset_fd_, 1);
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(20));
|
||||
}
|
||||
|
||||
inline ChipVersion Radio::getVersion()
|
||||
{
|
||||
uint8_t v[4]{};
|
||||
rcmd(OC_GET_VERSION, nullptr, 0, v, 4);
|
||||
return { v[0], v[1], v[2], v[3] };
|
||||
}
|
||||
|
||||
inline void Radio::imgCalFreqs(uint32_t hz, uint8_t &f1, uint8_t &f2)
|
||||
{
|
||||
uint32_t mhz = hz / 1'000'000u;
|
||||
uint32_t lo, hi;
|
||||
if (mhz < 446) { lo = 430; hi = 440; }
|
||||
else if (mhz < 740) { lo = 470; hi = 510; }
|
||||
else if (mhz < 890) { lo = 860; hi = 876; }
|
||||
else { lo = 900; hi = 928; }
|
||||
f1 = (uint8_t)(lo / 4);
|
||||
f2 = (uint8_t)((hi + 3) / 4);
|
||||
}
|
||||
|
||||
inline uint8_t Radio::computeLDRO(uint8_t sf, uint8_t bw)
|
||||
{
|
||||
static const uint32_t bw_khz[] = { 0, 15625, 31250, 62500, 125000,
|
||||
250000, 500000 };
|
||||
uint32_t bw_hz = (bw < 7) ? bw_khz[bw] : 125000;
|
||||
uint32_t sym_ms = (1u << sf) * 1000u / bw_hz;
|
||||
return (sym_ms > 16) ? 1 : 0;
|
||||
}
|
||||
|
||||
inline bool Radio::begin(const Config &c)
|
||||
{
|
||||
cfg_ = c;
|
||||
|
||||
spi_fd_ = ::open(c.spi_path, O_RDWR);
|
||||
if (spi_fd_ < 0) {
|
||||
if (c.verbose)
|
||||
std::fprintf(stderr, "[lr1121] cannot open %s: %m\n", c.spi_path);
|
||||
return false;
|
||||
}
|
||||
uint8_t mode = SPI_MODE_0, bits = 8;
|
||||
ioctl(spi_fd_, SPI_IOC_WR_MODE, &mode);
|
||||
ioctl(spi_fd_, SPI_IOC_WR_BITS_PER_WORD, &bits);
|
||||
ioctl(spi_fd_, SPI_IOC_WR_MAX_SPEED_HZ, &c.spi_hz);
|
||||
|
||||
if (!openGpio(c.reset_gpio, true, reset_fd_)) return false;
|
||||
if (!openGpio(c.busy_gpio, false, busy_fd_)) return false;
|
||||
|
||||
{ uint8_t nop = 0x00; spiTransfer(&nop, 1); }
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(1));
|
||||
hardReset();
|
||||
|
||||
ChipVersion ver = getVersion();
|
||||
if (c.verbose)
|
||||
std::fprintf(stderr, "[lr1121] hw=0x%02X type=0x%02X fw=0x%02X%02X\n",
|
||||
ver.hw, ver.type, ver.fw_hi, ver.fw_lo);
|
||||
if (ver.type != 0x03) {
|
||||
if (c.verbose)
|
||||
std::fprintf(stderr, "[lr1121] unexpected chip type 0x%02X (want 0x03=LR1121)\n",
|
||||
ver.type);
|
||||
return false;
|
||||
}
|
||||
|
||||
#define LR_STEP(msg) do { if (c.verbose) std::fprintf(stderr, "[lr1121] -> " msg "\n"); } while(0)
|
||||
|
||||
LR_STEP("SetStandby(RC)");
|
||||
{ const uint8_t a[] = {0x00}; wcmd(OC_SET_STANDBY, a, 1); }
|
||||
|
||||
// Crystal oscillator — no TCXO, no SetTcxoMode.
|
||||
// Calibrate from RC clock (required), then switch to XOSC standby so the
|
||||
// crystal stays running during radio configuration and TX/RX ramp-up.
|
||||
// Without STBY_XOSC here the PA cold-starts the crystal on every TX and
|
||||
// silently fails to ramp up.
|
||||
LR_STEP("Calibrate(ALL)");
|
||||
{ const uint8_t a[] = {CALIB_ALL}; wcmd(OC_CALIBRATE, a, 1); }
|
||||
|
||||
LR_STEP("ClearErrors");
|
||||
wcmd(OC_CLEAR_ERRORS);
|
||||
|
||||
LR_STEP("SetStandby(XOSC)");
|
||||
{ const uint8_t a[] = {0x01}; wcmd(OC_SET_STANDBY, a, 1); } // 0x01 = XOSC, not RC
|
||||
|
||||
#undef LR_STEP
|
||||
|
||||
// --- Radio configuration ------------------------------------------------
|
||||
{ const uint8_t a[] = {c.use_dcdc ? (uint8_t)0x01 : (uint8_t)0x00};
|
||||
wcmd(OC_SET_REGMODE, a, 1); }
|
||||
|
||||
{ const uint8_t a[] = {0x02}; wcmd(OC_SET_PKT_TYPE, a, 1); } // LoRa
|
||||
|
||||
uint32_t f = c.freq_hz;
|
||||
{ const uint8_t a[] = { (uint8_t)(f >> 24), (uint8_t)(f >> 16),
|
||||
(uint8_t)(f >> 8), (uint8_t) f };
|
||||
wcmd(OC_SET_RF_FREQ, a, 4); }
|
||||
|
||||
if (f < 1'000'000'000u) {
|
||||
uint8_t f1, f2; imgCalFreqs(f, f1, f2);
|
||||
const uint8_t a[] = {f1, f2}; wcmd(OC_CALIBRATE_IMAGE, a, 2);
|
||||
if (c.verbose)
|
||||
std::fprintf(stderr, "[lr1121] image cal: 0x%02X 0x%02X\n", f1, f2);
|
||||
}
|
||||
|
||||
{ const uint8_t a[] = {0x00, 0x00}; wcmd(OC_SET_PKT_ADRS, a, 2); }
|
||||
|
||||
uint8_t ldro = computeLDRO(c.sf, c.bw);
|
||||
{ const uint8_t a[] = {c.sf, c.bw, c.cr, ldro};
|
||||
wcmd(OC_SET_MOD_PARAM, a, 4);
|
||||
if (c.verbose)
|
||||
std::fprintf(stderr, "[lr1121] SF=%u BW=0x%02X CR=0x%02X LDRO=%u\n",
|
||||
c.sf, c.bw, c.cr, ldro); }
|
||||
|
||||
{ const uint8_t a[] = {0x00, 0x08, 0x00, 0xFF, 0x01, 0x00};
|
||||
wcmd(OC_SET_PKT_PARAM, a, 6); }
|
||||
|
||||
// pa_supply=0x00 → internal DC-DC regulator (correct for most modules).
|
||||
// 0x01 = VBAT direct — only needed on specific high-power reference designs.
|
||||
{ const uint8_t a[] = {c.pa_sel, 0x00, 0x04, 0x07};
|
||||
wcmd(OC_SET_PA_CFG, a, 4); }
|
||||
|
||||
{ const uint8_t a[] = {(uint8_t)(int8_t)c.tx_dbm, 0x02};
|
||||
wcmd(OC_SET_TX_PARAMS, a, 2); }
|
||||
|
||||
{ const uint8_t a[] = {c.lora_wan ? (uint8_t)0x01 : (uint8_t)0x00};
|
||||
wcmd(OC_SET_LORA_NET, a, 1); }
|
||||
|
||||
// RF switch via SetDioAsRfSwitch (0x022D).
|
||||
// enable=0x03 → DIO5 and DIO6 are RF switch outputs.
|
||||
// Bit 0 = DIO5 (RFSW0), bit 1 = DIO6 (RFSW1).
|
||||
// standby: both LOW | rx: DIO5=HIGH, DIO6=LOW | tx/tx_hp: DIO5=LOW, DIO6=HIGH
|
||||
{ const uint8_t a[] = { 0x03, // enable: DIO5 + DIO6
|
||||
0x00, // standby: both LOW
|
||||
0x01, // rx: DIO5=HIGH
|
||||
0x02, // tx: DIO6=HIGH
|
||||
0x02, // tx_hp: DIO6=HIGH
|
||||
0x00, // tx_hf: both LOW (2.4 GHz path unused)
|
||||
0x00, // gnss: both LOW
|
||||
0x00}; // wifi: both LOW
|
||||
wcmd(OC_SET_DIO_AS_RFSW, a, 8);
|
||||
if (c.verbose) std::fprintf(stderr, "[lr1121] RF switch configured (DIO5/DIO6)\n"); }
|
||||
|
||||
// After TX/RX (or an aborted TX due to EOL), fall back to STBY_RC so the
|
||||
// chip is in a known state. Without this the fallback is undefined and
|
||||
// subsequent SetStandby + SetTx sequences can be silently ignored.
|
||||
{ const uint8_t a[] = {0x01}; wcmd(OC_SET_FALLBACK_MODE, a, 1); }
|
||||
|
||||
const uint8_t irq_zero[8]{};
|
||||
wcmd(OC_SET_DIOIRQ, irq_zero, 8);
|
||||
clearIrq(IRQ_ALL);
|
||||
|
||||
if (c.verbose)
|
||||
std::fprintf(stderr, "[lr1121] init OK: %u Hz, SF%u, PA=%s, crystal osc\n",
|
||||
c.freq_hz, c.sf, c.pa_sel ? "HP" : "LP");
|
||||
return true;
|
||||
}
|
||||
|
||||
inline bool Radio::beginRaw(const Config &c)
|
||||
{
|
||||
cfg_ = c;
|
||||
|
||||
spi_fd_ = ::open(c.spi_path, O_RDWR);
|
||||
if (spi_fd_ < 0) {
|
||||
if (c.verbose)
|
||||
std::fprintf(stderr, "[lr1121] cannot open %s: %m\n", c.spi_path);
|
||||
return false;
|
||||
}
|
||||
uint8_t mode = SPI_MODE_0, bits = 8;
|
||||
ioctl(spi_fd_, SPI_IOC_WR_MODE, &mode);
|
||||
ioctl(spi_fd_, SPI_IOC_WR_BITS_PER_WORD, &bits);
|
||||
ioctl(spi_fd_, SPI_IOC_WR_MAX_SPEED_HZ, &c.spi_hz);
|
||||
|
||||
if (!openGpio(c.reset_gpio, true, reset_fd_)) return false;
|
||||
if (!openGpio(c.busy_gpio, false, busy_fd_)) return false;
|
||||
|
||||
{ uint8_t nop = 0x00; spiTransfer(&nop, 1); }
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(1));
|
||||
hardReset();
|
||||
return true;
|
||||
}
|
||||
|
||||
inline void Radio::reboot(bool stay_in_bootloader)
|
||||
{
|
||||
const uint8_t a[] = { (uint8_t)(stay_in_bootloader ? 0x01 : 0x00) };
|
||||
wcmd(OC_REBOOT, a, 1);
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(300));
|
||||
}
|
||||
|
||||
inline void Radio::end()
|
||||
{
|
||||
if (spi_fd_ >= 0) { ::close(spi_fd_); spi_fd_ = -1; }
|
||||
if (reset_fd_ >= 0) { ::close(reset_fd_); reset_fd_ = -1; }
|
||||
if (busy_fd_ >= 0) { ::close(busy_fd_); busy_fd_ = -1; }
|
||||
}
|
||||
|
||||
inline bool Radio::send(const uint8_t *data, uint8_t n)
|
||||
{
|
||||
// Return chip to XOSC standby and clear any prior error/IRQ state before TX.
|
||||
{ const uint8_t a[] = {0x01}; wcmd(OC_SET_STANDBY, a, 1); }
|
||||
wcmd(OC_CLEAR_ERRORS);
|
||||
|
||||
wcmd(OC_WRITE_BUF8, data, n);
|
||||
{ const uint8_t a[] = {0x00, 0x08, 0x00, n, 0x01, 0x00};
|
||||
wcmd(OC_SET_PKT_PARAM, a, 6); }
|
||||
|
||||
// Enable TX_DONE and TIMEOUT on DIO9 — matches RadioLib's startTransmit().
|
||||
// IRQ register is updated regardless, but this also lets DIO9 signal completion.
|
||||
{ const uint8_t a[] = {0x00, 0x00, 0x04, 0x04, // DIO9: TX_DONE(bit2)|TIMEOUT(bit10)
|
||||
0x00, 0x00, 0x00, 0x00}; // DIO8: none
|
||||
wcmd(OC_SET_DIOIRQ, a, 8); }
|
||||
|
||||
clearIrq(IRQ_ALL);
|
||||
{ const uint8_t a[] = {0x00, 0x00, 0x00}; wcmd(OC_SET_TX, a, 3); }
|
||||
|
||||
for (int i = 0; i < 50'000; ++i) {
|
||||
uint32_t irq = getIrq();
|
||||
if (irq & IRQ_TX_DONE) {
|
||||
clearIrq(IRQ_ALL);
|
||||
// Restore DIO IRQ mask to silent.
|
||||
const uint8_t z[8]{}; wcmd(OC_SET_DIOIRQ, z, 8);
|
||||
return true;
|
||||
}
|
||||
std::this_thread::sleep_for(std::chrono::microseconds(100));
|
||||
}
|
||||
|
||||
// Read stat bytes alongside IRQ for diagnosis.
|
||||
uint8_t sb[6] = {}; spiTransfer(sb, 6);
|
||||
uint32_t irq_now = ((uint32_t)sb[2]<<24)|((uint32_t)sb[3]<<16)|((uint32_t)sb[4]<<8)|sb[5];
|
||||
if (cfg_.verbose)
|
||||
std::fprintf(stderr, "[lr1121] send: TX timeout stat1=0x%02X stat2=0x%02X irq=0x%08X\n",
|
||||
sb[0], sb[1], irq_now);
|
||||
|
||||
const uint8_t z[8]{}; wcmd(OC_SET_DIOIRQ, z, 8);
|
||||
clearIrq(IRQ_ALL);
|
||||
{ const uint8_t a[] = {0x01}; wcmd(OC_SET_STANDBY, a, 1); }
|
||||
return false;
|
||||
}
|
||||
|
||||
inline int Radio::receive(uint8_t *buf, uint8_t cap, uint32_t timeout_ms,
|
||||
RxInfo *rx_info)
|
||||
{
|
||||
{ const uint8_t a[] = {0x01}; wcmd(OC_SET_STANDBY, a, 1); }
|
||||
|
||||
// Enable RX_DONE(bit3), TIMEOUT(bit10), CRC_ERR(bit7) on DIO9 — matches RadioLib.
|
||||
{ const uint8_t a[] = {0x00, 0x00, 0x04, 0x88, // DIO9: RX_DONE|TIMEOUT|CRC_ERR
|
||||
0x00, 0x00, 0x00, 0x00};
|
||||
wcmd(OC_SET_DIOIRQ, a, 8); }
|
||||
|
||||
clearIrq(IRQ_ALL);
|
||||
uint32_t t = (timeout_ms == 0) ? 0x00FF'FFFFu
|
||||
: (uint32_t)(timeout_ms * 32768ull / 1000);
|
||||
{ const uint8_t a[] = {(uint8_t)(t >> 16), (uint8_t)(t >> 8), (uint8_t)t};
|
||||
wcmd(OC_SET_RX, a, 3); }
|
||||
|
||||
for (;;) {
|
||||
uint32_t irq = getIrq();
|
||||
|
||||
if (irq & IRQ_RX_DONE) {
|
||||
bool crc_err = irq & IRQ_CRC_ERR;
|
||||
clearIrq(IRQ_ALL);
|
||||
|
||||
if (rx_info) {
|
||||
uint8_t ps[3]{};
|
||||
rcmd(OC_GET_PKT_STATUS, nullptr, 0, ps, 3);
|
||||
rx_info->rssi_dbm = -(int8_t)(ps[0] >> 1);
|
||||
rx_info->snr_db = ((int8_t)ps[1] + 2) >> 2;
|
||||
rx_info->signal_rssi_dbm = -(int8_t)(ps[2] >> 1);
|
||||
}
|
||||
|
||||
if (crc_err) return -2;
|
||||
|
||||
uint8_t stat[2]{};
|
||||
rcmd(OC_GET_RXBUF_STA, nullptr, 0, stat, 2);
|
||||
uint8_t len = (stat[0] < cap) ? stat[0] : cap;
|
||||
uint8_t p[2] = { stat[1], len };
|
||||
rcmd(OC_READ_BUF8, p, 2, buf, len);
|
||||
return len;
|
||||
}
|
||||
|
||||
if (irq & IRQ_TIMEOUT) { clearIrq(IRQ_ALL); return -1; }
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(1));
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace lr1121
|
||||
@ -30,7 +30,7 @@ GLuint compile(GLenum t, const std::string& src)
|
||||
if (!ok) {
|
||||
char log[1024];
|
||||
glGetShaderInfoLog(s, sizeof(log), NULL, log);
|
||||
std::cout << "shader compile failed:\n" << log;
|
||||
std::cerr << "shader compile failed:\n" << log;
|
||||
}
|
||||
return s;
|
||||
}
|
||||
@ -51,8 +51,8 @@ int main()
|
||||
|
||||
if(!img1 || !img2)
|
||||
{
|
||||
std::cout << "image load failed\n";
|
||||
return 0;
|
||||
std::cerr << "image load failed\n";
|
||||
return 1;
|
||||
}
|
||||
|
||||
// ---------------- TEXTURES ----------------
|
||||
@ -99,7 +99,8 @@ int main()
|
||||
if (!linked) {
|
||||
char log[1024];
|
||||
glGetProgramInfoLog(prog, sizeof(log), NULL, log);
|
||||
std::cout << "program link failed:\n" << log;
|
||||
std::cerr << "program link failed:\n" << log;
|
||||
return 1;
|
||||
}
|
||||
|
||||
// ---------------- QUAD (FIXED) ----------------
|
||||
@ -133,8 +134,10 @@ int main()
|
||||
glBindFramebuffer(GL_FRAMEBUFFER,fbo);
|
||||
glFramebufferTexture2D(GL_FRAMEBUFFER,GL_COLOR_ATTACHMENT0,GL_TEXTURE_2D,outTex,0);
|
||||
|
||||
if(glCheckFramebufferStatus(GL_FRAMEBUFFER) != GL_FRAMEBUFFER_COMPLETE)
|
||||
std::cout << "FBO broken\n";
|
||||
if(glCheckFramebufferStatus(GL_FRAMEBUFFER) != GL_FRAMEBUFFER_COMPLETE) {
|
||||
std::cerr << "FBO broken\n";
|
||||
return 1;
|
||||
}
|
||||
|
||||
// ---------------- RENDER ----------------
|
||||
glUseProgram(prog);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user